Knowledge note
Unified Bus (UB)
Huawei's interconnect family for remote memory, asynchronous movement, collectives, and Ethernet-connected scale-out.
Unified Bus (UB)
Unified Bus (UB) is Huawei’s interconnect family that combines remote-memory semantics, asynchronous transport, collective communication, and Ethernet-connected scale-out for Ascend systems.
Why It Exists
Large-model systems need more than point-to-point messages: they need bulk transfers, fine-grained atomics, shared-memory-style access, reductions, and scalable topologies. Forcing all of those operations through a host protocol increases software complexity and adds avoidable latency.
How It Works
UB 2.0 provides synchronous UB Memory Load/Store/Atomic operations, asynchronous URMA copy/message operations, and CCU collective missions. Ascend 950 exposes 18 x4 ports through HiLink SerDes, supports Full Mesh/Clos/nD-Mesh-style topologies, and can use UBoE to carry UB scale-out traffic over Ethernet.
Tradeoffs
UB’s unified programming family does not make remote access local. Link speed, port reuse, route contention, reliability mode, address translation, and switch topology remain visible performance and correctness boundaries.
Common Confusions
- Unified Bus vs. Unified Buffer: UB means the inter-chip Unified Bus in this term; Unified Buffer is the Vector Core’s local on-chip storage.
- Unified Bus vs. PCIe: PCIe is a host/IO protocol that Ascend 950 also supports; UB adds AI-oriented remote-memory and collective semantics.
- UB vs. UBoE: UBoE is the Ethernet attachment of UB, not a separate replacement for the UB protocol.
Where It Appears
- Ascend 950 NPU Architecture: Compute, Memory, and Unified Bus — Connects UB Memory, URMA, CCU, port reuse, and supernode topology.
Related Terms
- URMA — UB’s asynchronous remote-memory and message semantic.
- Collective Communication Unit (CCU) — Hardware collective offload on the UB path.
- All-Reduce — One collective pattern that UB/CCU can accelerate.